Overcoming the obstacles in high speed serial channels

A 1-dayIntensive Workshop fromBogatin Enterprises and beTheSignal.com

The cure for FUD (Fear, Uncertainty and Doubt)

Are you designing one of the alphabet soup high speed serial links like PCIe, SATA, SAS, XAUI, GigE, USB or LVDS? Then all of your interconnects are differential pairs and eliminating signal integrity problems in your design will determine whether your product works or not.

This one-day, intensive training will bring you “up to speed” on how to design the physical interconnects of your channel to improve signal quality and achieve the bit rate you need. We eliminate the myth conceptions that dominate the industry and show you the right way of designing differential pairs that operate above 10 Gbps.

We eliminate the confusion over:

• Dielectric loss 

• The limits to FR4

• Conductor loss and copper roughness 

• S-parameters without tears

• Differential mode vs odd mode impedance 

• Mode conversion and length matching

• Tight or loose coupling 

• Transparent via design 11/21/10

Many important design tradeoff questions can only be answered with “it depends.” And the way we answer it depends questions is by putting in the numbers. Unique to this class, we will introduce a simple, easy to use simulation tool that will empower you to answer many “it depends” questions, specific to your next design.

We supply a copy of QUCS and all the example files, you supply your lap top, running a Windows operating system. The software and example files are fully functional and yours to take back with you.

No previous simulation experience is necessary. Even if you have never done any simulation before, you will find this an incredibly easy to use tool. If you are familiar with SPICE, you will find QUCS to be far easier and more versatile.

To participate in the hands on labs, you must bring your own lap top to the class.

TRAINING PROGRAM OUTLINE  

Module 1 Differential pairs

• The four multi gigabit problems
• Differential and common signals
• Differential impedance, odd mode impedance
• Stack up design: walk the line principle
• Channel to channel cross talk
• Tight or loose coupling?

Module 2: Losses and S-parameters

• Why frequency dependent loss is important
• Losses and jitter
• Conductor and dielectric loss
• SDD21 and attenuation
• Using equalization to compensate for attenuation
• Length- bandwidth tradeoffs

Module 3: Differential circuits

• Simulating differential pairs
• Unscrambling eyes: SBR, PDA, step response, PRBS
• Routing topologies and terminations
• Mode conversion and asymmetry
• When to terminate the common signal
• Impact from vias and discontinuities 

Module 4: Hands on Lab

• Differential and common signals: transient and single bit response
• Mode conversion and terminating common signals
• Impact from vias and stubs
• Impact from connectors
• Simulating the S-parameters: losses and discontinuities