| .: MICROSYSTEMS
Introduction
Who Will Benefit
Key Collaboration
Courses
Tools & Technologies
Certification
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Introduction
SHRDC was appointed by the Malaysian government to establish MIMs. MIMs is responsible for the up-skilling and development of a pool of specialist integrated circuit (“IC”) designers through learning and exposure to the latest technologies. The objective of the MIMs program is to produce more IC designers who are capable of meeting the industries’ operational requirements. MIMs will also serve as a centre for advanced technological education in Malaysia.
The MIMs courses include:
i.Advanced Integrated Circuit Design Technologies;
ii.Advanced Packaging Technologies;
iii.Test Methodologies and Strategies;
iv.Product Enhancement; and
v.Failure Analysis and Reliability.
MIMs adopts an integrated approach to technology learning. The courses include classroom sessions, seminars, e-learning and library research. The classroom sessions will combine workshops, laboratory demonstrations and hands-on experiments. For selected courses, our participants will also be able to undergo industrial training and apprenticeship programmes.
To provide a complete environment for practical learning, the MIMs facility has been fully-equipped with the state-of-the-art EDA tools, testing and prototyping equipment.
Who Will Benefit
Our courses cater to the individual who seeks to upgrade his skills whilst answering the company’s need to monitor and maintain a standard of excellence by bringing out the best in their professionals.
We work with companies in the training and grading of personnel where curriculum and schedules can be customized to suit specific goals.
Key Collaboration
MIMs’ faculty comprises of experienced personnel from the industry and educational institutions who have been identified locally and in foreign countries for their track record in their respective areas. These experts are also trained professionals in the area of competency-based professional learning.
MIMs has been realized from collaborations with related manufacturers and other institutions such as research laboratories, local and foreign universities, IC design houses and incubators. The network connection with these identities enables MIMs to access to a wealth of the relevant knowledge and keep abreast of the technological trends.
MIMs courses have been jointly-developed with and certified by the following powerhouses:
* Toppan Technical Design Center Co. Ltd, Japan;
* Silicon Valley Technical Institute, USA;
* Agilent Technologies; and
* Swinburne University of Technology (Sarawak campus).
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Courses
MIMs offers both short and long term courses.
The short-term courses are mainly for the existing industry professionals who wish enhance continued opportunity in employment. The short courses are of a few-day duration but highly intensive. They enable the industry professionals to acquire capability in new and emerging technologies.
A detailed listing and schedules of the short courses that MIMs offers can be found here.
The long-term courses are known as INSEP (Industrial Skill Enhancement Programme). It is an integrated training and development programme initiated and funded by the Malaysian government. INSEP aims at training graduate engineers on industry-relevant skills and knowledge so as to enhance their employability potential in the industry.
The full listing of INSEP courses is available here.
Tools & Technologies
SHRDC has set up a fully equipped facility for the MIMs training and learning both in terms of the hard and software. The facility carries a comprehensive range of state-of-the-art EDA tools such as Cadence's Analog IC Design and PCB Design Tool. The Test and Measurement section has a wide range of testing and prototyping equipment to support IC Testing. This includes the deployment of advanced equipment such as Vector Network Analyzer and Time Domain Reflectometry system.
Certification
Upon successful completion of MIMs’ courses, our participants will obtain the competency certificates from the following institutes that jointly-developed the MIMs coursework:
* Toppan Technical Design Center Co.Ltd, Japan;
* Silicon Valley Technical Institute, USA;
* Agilent Technologies; and
* Swinburne University of Technology (Sarawak campus).
| |
No. |
Course |
Title |
Duration
(Day) |
|
PSMB Scheme |
SMIDEC Funding |
1. |
IC Design
|
Logic Synthesis with Design Compiler
Training Date:
| No Training Date Available |
|
3 |
|
SBL |
Yes |
2. |
IC Design
|
Static Timing Analysis Using Prime Time
Training Date:
| No Training Date Available |
|
3 |
|
SBL |
No |
3. |
IC Packaging
|
EDA Tool: Ansoft Quick 3D
Training Date:
| 5-1-2010 ~ 8-1-2010 |
24-5-2010 ~ 27-5-2010 |
14-12-2010 ~ 17-12-2010 |
|
3 |
|
SBL |
Yes |
4. |
IC Packaging
|
EDA Tool: Package Design for Wirebond and Flipchip using Allegro Packaged Designer (APD)
Training Date:
| 11-1-2010 ~ 14-1-2010 |
18-5-2010 ~ 21-5-2010 |
28-12-2010 ~ 31-12-2010 |
|
3 |
|
SBL |
Yes |
5. |
IC Packaging
|
IC Package Analysis using Electromagnetic Solvers
Training Date:
| 10-2-2010 ~ 12-2-2010 |
24-8-2010 ~ 26-8-2010 |
22-11-2010 ~ 23-11-2010 |
|
4 |
|
SBL |
Yes |
6. |
PCB Design
|
An Introduction to EMI and EMC on PCB
Training Date:
| 11-5-2010 ~ 13-5-2010 |
9-11-2010 ~ 11-11-2010 |
|
3 |
|
SBL |
Yes |
7. |
PCB Design
|
ESD[Char66]EOS[Char66]EMI AWARENESS & CONTROL TRAINING
Training Date:
| No Training Date Available |
|
2 |
|
SBL |
No |
8. |
PCB Design
|
Multi Layer Control Impedance High Frequency Board Design
Training Date:
| 9-6-2010 ~ 10-6-2010 |
11-8-2010 ~ 12-8-2010 |
|
2 |
|
PERLA |
Yes |
9. |
PCB Design
|
PCB Impedance Design using Electromagnetic Solvers-HFSS
Training Date:
| No Training Date Available |
|
3 |
|
SBL |
Yes |
10. |
PCB Design
|
PCB Signal Integrity and EMI Noise
Training Date:
| 16-6-2010 ~ 18-6-2010 |
26-10-2010 ~ 28-10-2010 |
|
3 |
|
PERLA |
Yes |
11. |
PCB Design
|
PCB Signal Integrity and Simulation using Allegro S.I.
Training Date:
| No Training Date Available |
|
3 |
|
SBL |
Yes |
12. |
Testing Instruments
|
Testing Instruments Series - Oscilloscopes
Training Date:
| No Training Date Available |
|
1 |
|
SBL |
Yes |
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